sgdk
z80_ctrl.h
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00001 
00015 #ifndef _Z80_CTRL_H_
00016 #define _Z80_CTRL_H_
00017 
00018 
00019 #define Z80_HALT_PORT                   0xA11100
00020 #define Z80_RESET_PORT                  0xA11200
00021 
00027 #define Z80_RAM_START                   0xA00000
00028 
00033 #define Z80_RAM_END                     0xA01FFF
00034 
00039 #define Z80_RAM                         Z80_RAM_START
00040 
00045 #define Z80_RAM_LEN                     ((Z80_RAM_END - Z80_RAM_START) + 1)
00046 
00051 #define Z80_YM2612                      0xA04000
00052 
00057 #define Z80_BANK_REGISTER               0xA06000
00058 
00064 #define Z80_DRV_COMMAND                 0xA00100
00065 
00070 #define Z80_DRV_STATUS                  0xA00102
00071 
00076 #define Z80_DRV_PARAMS                  0xA00104
00077 
00078 // default command and status value
00079 #define Z80_DRV_COM_PLAY_SFT            0
00080 #define Z80_DRV_COM_STOP_SFT            4
00081 #define Z80_DRV_STAT_PLAYING_SFT        0
00082 #define Z80_DRV_STAT_READY_SFT          7
00083 
00088 #define Z80_DRV_COM_PLAY                (1 << Z80_DRV_COM_PLAY_SFT)
00089 
00093 #define Z80_DRV_COM_STOP                (1 << Z80_DRV_COM_STOP_SFT)
00094 
00098 #define Z80_DRV_STAT_PLAYING            (1 << Z80_DRV_STAT_PLAYING_SFT)
00099 
00103 #define Z80_DRV_STAT_READY              (1 << Z80_DRV_STAT_READY_SFT)
00104 
00105 // channel definition
00106 #define Z80_DRV_CH0_SFT                 0
00107 #define Z80_DRV_CH1_SFT                 1
00108 #define Z80_DRV_CH2_SFT                 2
00109 #define Z80_DRV_CH3_SFT                 3
00110 
00115 #define Z80_DRV_CH0                     (1 << Z80_DRV_CH0_SFT)
00116 
00120 #define Z80_DRV_CH1                     (1 << Z80_DRV_CH1_SFT)
00121 
00125 #define Z80_DRV_CH2                     (1 << Z80_DRV_CH2_SFT)
00126 
00130 #define Z80_DRV_CH3                     (1 << Z80_DRV_CH3_SFT)
00131 
00132 
00137 #define Z80_DRIVER_NULL                 0
00138 
00143 #define Z80_DRIVER_PCM                  1
00144 
00149 #define Z80_DRIVER_2ADPCM               2
00150 
00156 #define Z80_DRIVER_4PCM                 4
00157 #define Z80_DRIVER_4PCM_ENV             Z80_DRIVER_4PCM
00158 
00165 #define Z80_DRIVER_XGM                  5
00166 
00170 #define Z80_DRIVER_CUSTOM               -1
00171 
00172 #define Z80_DRIVER_DEFAULT              Z80_DRIVER_XGM
00173 
00174 
00181 void Z80_init();
00182 
00187 bool Z80_isBusTaken();
00194 void Z80_requestBus(bool wait);
00203 bool Z80_getAndRequestBus(bool wait);
00204 
00209 void Z80_releaseBus();
00210 
00215 void Z80_startReset();
00220 void Z80_endReset();
00221 
00228 void Z80_setBank(const u16 bank);
00229 
00240 u8 Z80_read(const u16 addr);
00253 void Z80_write(const u16 addr, const u8 value);
00254 
00265 void Z80_clear(const u16 dest, const u16 size, const bool resetz80);
00278 void Z80_upload(const u16 dest, const u8 *data, const u16 size, const bool resetz80);
00290 void Z80_download(const u16 from, u8 *dest, const u16 size);
00291 
00304 u16  Z80_getLoadedDriver();
00309 void Z80_unloadDriver();
00324 void Z80_loadDriver(const u16 driver, const bool waitReady);
00334 void Z80_loadCustomDriver(const u8 *drv, u16 size);
00335 
00340 u16  Z80_isDriverReady();
00341 
00342 
00343 #endif // _Z80_CTRL_H_
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